1. Field of the Invention
The present invention relates to a method of forming a semiconductor device, and more particularly, to a method of fabricating a semiconductor device having a strained silicon layer.
2. Description of the Prior Art
With the trend of miniaturization of semiconductor device dimensions, the scale of the gate, source and drain of a transistor has decreased in accordance with the decrease in critical dimension (CD). Due to the physical limitation of the materials used, the decrease in scale of the gate, source and drain results in the decrease of carriers which determine the magnitude of the current in the transistor element, and this can adversely affect the performance of the transistor. Accordingly, in order to boost up a metal-oxide-semiconductor (MOS) transistor, increasing carrier mobility is an important consideration in the field of current semiconductor technique.
In the conventional technologies, a strained semiconductor substrate is used to provide biaxial tensile stress for increasing carrier mobility. A silicon-germanium (SiGe) layer is formed on the silicon substrate, and a silicon layer is further formed on the SiGe layer to constitute the strained semiconductor substrate. The lattice constant of silicon (Si) is 5.431 angstroms (A), and the lattice constant of germanium (Ge) is 5.646 A. When the silicon layer is disposed on the SiGe layer, lateral stress is formed in the silicon layer due to the lattice constant difference, so this silicon layer can serve as a strained silicon layer. The strained silicon layer facilitates the formation of a gate dielectric layer of high quality, and provides stress to the channel region of a transistor for enhancing carrier mobility.
The excessive thermal budget from other semiconductor process such as a thermal oxidation process performed during the formation of shallow trench isolations (STI) or an annealing process may cause defects such as dislocations, and even worse, the loss of stress in the strained silicon layer. Consequently, how to prevent side effects induced by these other semiconductor process while maintaining the normal function of the strained silicon layer is an important issue in this field.